Flash Memory Controller
6.6
Flash memory map/register definition
Flash control registers are not available directly from User mode. Nevertheless, the FOPT register will be
altered during POR and reset with the content of the upper two bytes of the main flash array. Flash
functions can only be accessed via the ROM routines described in Chapter 7, “ROM” .
Table 6-3. Flash memory map
Address offset
0x0000
Register
Flash Options Register (FOPT)
Access
RW
Reset
0x00FE
Details
6.6.1
Flash Options register
FOPT[7:0] is loaded from the last byte of the main array (NVOPT) during the reset sequence. Therefore
all modifications to FOPT[7:0] are lost at the next reset. Permanent changes to FOPT[7:0] can only be done
by modifying the flash data stored at NVOPT.
To change the value in this register, erase and reprogram the NVOPT location in flash memory as usual
and then issue a new MCU reset.
FOPT can only be read or modified when the CPU is in Supervisor mode.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
Reserved
BF
Rsv’d
0
CHECKB
1
1
PW
1
SSW
SSC
Write
0
0
0
Reset
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
= Unimplemented or Reserved
Figure 6-2. Flash Options register (FOPT)
Table 6-4. Flash Options register (FOPT) field descriptions
Bit(s)
15:14
13
12
11
Field
BF
Description
Reserved
Always write as “00.”
Boot from Flash
This is a simple R/W bit in the flash controller. T his bit is initialized to the inverse of Bit 5 of flash location
0x3FFE by the boot ROM on power-up. It is read by the ROM code in a later step of the reset process.
The code value affects where control is ultimately transferred.
0 Do not boot from flash.
1 Boot from flash on next reset.
Reserved
Always write as “0.”
Reserved
MMA955xL Intelligent, Motion-Sensing Platform Hardware Reference Manual, Rev. 1.0
66
Freescale Semiconductor, Inc.
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